P.O. Box 710
San Pedro, CA 90733-0710 Tel(310)833-0710
FAX (310)33-9658

www.intusoft.com

Product: Test Designer

Description: New EDA Tool that automates analog and mixed signal fault simulation, fault diagnostics, test software development, and acceptance test generation

Availability: 3rd Quarter 1997

Compatibility: x86 PC with 32Meg RAM, Windows 95 or NT

Contact: Charles Hymowitz - Vice President Intusoft (310) 833-0710, Fax (310) 833-9658. E-mail: info@intusoft.com, Web: http://www.intusoft.com

New Test Designer Redefines Test Software Development

Intusoft, makers of the popular IsSpice4 simulator, has released a powerful new simulation based test synthesis product called Test Designer™. Simply put, Test Designer automates test simulation, fault analysis, and fault isolation, and generates detailed test strategy reports. The user can easily pair different circuit configurations with various analyses to create "tests". Tests may include one or more component failure modes or out-of-tolerance conditions. Measurements such as peak-peak, maximum, rise time, etc., can be assigned to each test, and tolerances are assigned to each measurement in order to grade the performance of each test and determine the pass/fail status. Test Designer runs the entire suite of tests without the need for any operator intervention and creates a test strategy report that summarizes the test results. This powerful capability extends SPICE well beyond its current single simulation-oriented boundaries, and provides a framework for automatic test set software design. Test Designer was officially introduced at the 97' Design Automation Conference in Anaheim, California.

Test Designer includes a fully integrated schematic entry tool, extensive model libraries, state-of-the-art SPICE3 based analog and mixed signal simulator, a graphical data post processor, and a host of features that handle the test data analysis and reporting. All key data entry, analysis, and reporting features are graphically driven. The user does not have to write any scripts or do any programming in order to define a model, a fault, a measurement, or a test. Over 10,000 part models are provided and most include predefined failure modes. For example, all passive and active components use the US Navy CASS "standard" for the default failure modes.

Test design is accomplished graphically, by either automatically or manually selecting fault tree nodes from an ordered list which is sorted by test entropy. The results for each fault tree design are saved with user names and descriptions. A fault tree can be designed all at once or in steps that gradually add more complex tests. The user can look at the results for each fault tree node, examine the underlying tests, and modify the design strategy.

Test results are output to a file in several formats that can be imported to the designer's test programming language. These files contain the logical structure of the tests. The designer only needs to add the test equipment specific coding. The data format is suitable for reports and user documentation.

With Test Designer, test strategies can be improved and debugged by enabling virtual production studies without the need to build a prototype or even wait until the design process has been completed. Test Designer™ is a vast improvement over current manual test development practices, and dramatically reduces the time-consuming process of test software development.

Intusoft is pleased to announce an early release program which will be available May 1, 1997 through July 31, 1997. Both coding and debugging of the product have been completed and the Test Designer program looks to be a revolutionary product. It will be several months before documentation is completed, but in the mean time, the product is ready to go with its built-in on-line help system and tutorials. For the next two months, Intusoft is offering a 20% discount on the product and its maintenance; so engineers can get started right away and save money, too! It requires Windows 95 or Windows NT. Product maintenance is 15% of the purchase price per year.

Test Designer Caption: Shown above is a sample report which was generated by Test Designer, and shows an operating point measurement for each part fault. The Pass\Fail histogram shows the results of various circuit measurements and indicates which tests failed low, high, passed, or did not converge to an solution. The entire set of measurements is made automatically; no user interaction is required. The Nominal circuit measurements are defined via an initial simulation which does not have any out-of tolerance conditions or faults set. Each measurement can have a different set of Min/Max tolerances.